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10 Tips in the Design of GVE Switching Power Supply

  1. Network connectivity, after the schematic design is completed, network connectivity needs to be carefully checked to prevent network connectivity caused by writing problems, such as PWR_IN and PWR-IN, may not be obvious in the schematic diagram. But it’s a different network.
  2. When placing decoupling capacitors of Guanyuda switching power adapter, the position of decoupling capacitors should be paid attention to. In the design of digital circuits, decoupling capacitors should be placed as close to IC as possible. The power adapter should pass through the capacitor and then reach the IC, to maximize the effect of decoupling capacitance. In multilayer design, the capacitance and the IC should be on the same side as possible, and the capacitance should not be connected to the IC through the hole.
  3. Digital circuits and analog circuits are as separate as possible. When digital circuits are working, steep changes in the level will produce very large currents, which will cause fluctuations in the level of power adapters when the internal resistance of the power adapters is relatively large. In serious cases, logic level recognition errors can be caused, especially the interference effects on analog circuits can not be ignored, so the two parts should be treated separately as far as possible.
  4. The circuit connected to the ground is parallel to the power adapter as far as possible to avoid the antenna effect caused by the large circle, which is helpful to improve the EMC level of the system.
  5. It is best to place the components with a certain spacing, set the default grid, can make the circuit board design more neat, the appropriate spacing is also conducive to the circuit board welding and debugging and maintenance
  6. The selection of filter capacitor of power adapter can select the electrolytic capacitor with large capacity as far as possible in power frequency, while in DCDC circuit, according to the frequency of power adapter and 1m frequency, the capacitor of 0.1-10uF patch can be selected. The higher the frequency is, the smaller the capacitance is, the larger the capacitance is due to the existence of equivalent inductance, the lower the efficiency is, and even the oscillation is produced, which intensifies the ripple of the power adapter.
  7. When allowed, the external interface is protected as much as possible by TVS to avoid high current and high voltage due to other causes, which may damage the core circuit.
  8. In the debugging phase of the prototype, the LED indication is increased as much as possible, and the test points are increased as much as possible. For the unused GPIO ports, the test points are also used as far as possible, especially for networks such as BGA packages that are difficult to elicit by flying lines. At the same time, the network can be isolated by increasing resistor or resistor as much as possible, which can effectively avoid the situation that the circuit can not work because of the network error and it is too late to remake the proofing.
  9. The power adapter of each function module should be separated by 0R resistor, and the high current can be checked effectively during the debugging of the power adapter. At the same time, it can monitor the working current of each function module, and locate the normal or abnormal working condition of the function module in time.
  10. Circuit design is best hierarchical design, the interface between the modules to connect, facilitate the debugging of each functional module.

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